On-chip jitter tolerance measurement technique with independent jitter frequency modulation from VCO in CDR

نویسندگان
چکیده

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

BIST for Jitter Measurement and Jitter Decomposition of CDR

This paper describes a Built-In-Self-Test (BIST) circuit that tests the relative timing jitter of NRZ data and recovered clock of PLL-based CDR. Using the jitter information, the bit error rate and peak to peak jitter can be estimated. This BIST circuit doesn’t need a high resolution and high accuracy delay line to achieve high accuracy measurement. It depends on calibration and curve fitting a...

متن کامل

VCO Jitter Simulation and Its Comparison With Measurement

We have simulated the phase noise of a voltage controlled oscillator (VCO) using an RF circuit simulator, SpectreRF [1]. This simulator uses a variation of the periodic noise analysis rst proposed by Okumura, et al [2]. It computes the power spectral density of the noise as a function of frequency. By assuming that only white noise sources are present in the oscillator it is possible to derive ...

متن کامل

Time-to-voltage converter for on-chip jitter measurement

In this paper, we present the concept and design of a time-to-voltage converter (TVC), and demonstrate its application to on-chip phase-locked loop (PLL) jitter measurement. The TVC operates in an analog, continuous mode without using a sampling clock. It compares the signal under measurement with a reference signal by charging and discharging a capacitor. First, the low-frequency reference sig...

متن کامل

On-chip jitter measurement for true random number generators

Applications of true random number generators (TRNGs) span from art to numerical computing and system security. In cryptographic applications, TRNGs are used for generating new keys, nonces and masks. For this reason, a TRNG is an essential building block and often a point of failure for embedded security systems. One type of primitives that are widely used as source of randomness are ring osci...

متن کامل

A 622Mbps burst mode CDR with jitter reduction capability

This paper describes a novel burst-mode CDR(Clock and Data Recovery) circuit can be used in 622Mbps burst mode applications. The designed circuit is basically a PLL(Phase Locked Loop) has 2 PD(Phase Detector)s each for reference clock and NRZ type data, altered by external control signal. This CDR was fabricated in 1-poly 5-metal 0.25 μ m CMOS technology. Jitter generation, burst/continuous mod...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: IEICE Electronics Express

سال: 2015

ISSN: 1349-2543

DOI: 10.1587/elex.12.20150570